Introduction Predicting gallium arsenide (GaAs) semiconductor temperature is imperative since it affects the performance and reliability of the chip and the design as a whole. In many circumstances, the thermal engineer will be asked to provide expeditious and accurate answers to trade studies regarding various FET layouts and geometry, metallization schemes, and conduction … [Read more...]
Thermo-Reflectance Thermography For Submicron Temperature Measurements
The primary approach to maintaining the aggressive progress in the microelectronics industry has been to increase the density of elementary transistors and to reduce the size of their active areas. As a result, the removal of heat generated by various internal system components has become a major design challenge, further complicated by the lack of knowledge of the temperature … [Read more...]
Thermal Strain in Semiconductor Packages, Part II
Introduction This Calculation Corner continues Part I, published in the previous issue [1]. Part I described the construction of a typical flip-chip package configuration for high-power chips, consisting of a laminate assembly of materials adhesively bonded together and having different Coefficients of Thermal Expansion (CTE). The process of bonding these different materials … [Read more...]
A Practical Implementation Of Silicon Microchannel Coolers
Introduction More than twenty-five years ago, Tuckerman and Pease first described the use of silicon microchannel cooling for very high power densities [1]. However, the coolers could not be fabricated easily and pressure drops were very high. As chip power densities are now increasing beyond air cooling limits, a variety of liquid cooling methods are being investigated. Due to … [Read more...]
Advanced Cooling Using Meso-Scale Evaporative Cold Plates
Introduction Thermal management of servers and communications equipment has become significantly more challenging over the past several years. As is well known, processor powers have increased to 150 W or more and are projected to continue to rise, despite the move to multi-core designs (and the huge investment in software that this entails) [1]. Rack-level functional density … [Read more...]
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